<?xml version="1.0" encoding="UTF-8"?>
<!DOCTYPE article PUBLIC "-//NLM//DTD JATS (Z39.96) Journal Publishing DTD v1.3 20210610//EN" "JATS-journalpublishing1-3.dtd">
<article article-type="research-article" dtd-version="1.3" xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink" xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance" xml:lang="ru"><front><journal-meta><journal-id journal-id-type="publisher-id">sibsutis</journal-id><journal-title-group><journal-title xml:lang="ru">Вестник СибГУТИ</journal-title><trans-title-group xml:lang="en"><trans-title>The Herald of the Siberian State University of Telecommunications and Information Science</trans-title></trans-title-group></journal-title-group><issn pub-type="ppub">1998-6920</issn><publisher><publisher-name>СибГУТИ</publisher-name></publisher></journal-meta><article-meta><article-id pub-id-type="doi">10.55648/1998-6920-2024-18-3-57-72</article-id><article-id custom-type="elpub" pub-id-type="custom">sibsutis-833</article-id><article-categories><subj-group subj-group-type="heading"><subject>Research Article</subject></subj-group><subj-group subj-group-type="section-heading" xml:lang="ru"><subject>Статьи</subject></subj-group></article-categories><title-group><article-title>Отказы интегральных схем, вызванные воздействием эффектов электромиграции и антенны</article-title><trans-title-group xml:lang="en"><trans-title>Integrated Circuits Failures Caused by Electromigration and Antenna Effects</trans-title></trans-title-group></title-group><contrib-group><contrib contrib-type="author" corresp="yes"><contrib-id contrib-id-type="orcid">https://orcid.org/0000-0002-2974-0497</contrib-id><name-alternatives><name name-style="eastern" xml:lang="ru"><surname>Шубин</surname><given-names>В. В.</given-names></name><name name-style="western" xml:lang="en"><surname>Shubin</surname><given-names>V. V.</given-names></name></name-alternatives><bio xml:lang="ru"><p>Шубин Владимир Владимирович - к.т.н., доцент кафедры технической электроники СибГУТИ; начальник отдела по разработке аналоговых ИМС АО «НЗПП Восток».</p><p>630082, Новосибирск, ул. Дачная, 60</p></bio><bio xml:lang="en"><p>Vladimir V. Shubin - Cand. of Sci. (Engineering), assistant professor of the Department of Technical Electronics of SibSUTIS, Head of the Development of analog ICs of JSC "NZPP Vostok department".</p><p>630082, Novosibirsk, Dachnaya str., 60</p></bio><email xlink:type="simple">shubin@nzpp.ru</email><xref ref-type="aff" rid="aff-1"/></contrib></contrib-group><aff-alternatives id="aff-1"><aff xml:lang="ru"><institution>Сибирский государственный университет телекоммуникаций и информатики (СибГУТИ)</institution><country>Россия</country></aff><aff xml:lang="en"><institution>Siberian State University of Telecommunications and Information Science (SibSUTIS)</institution><country>Russian Federation</country></aff></aff-alternatives><pub-date pub-type="collection"><year>2024</year></pub-date><pub-date pub-type="epub"><day>12</day><month>03</month><year>2024</year></pub-date><volume>18</volume><issue>3</issue><fpage>57</fpage><lpage>72</lpage><permissions><copyright-statement>Copyright &amp;#x00A9; Шубин В.В., 2024</copyright-statement><copyright-year>2024</copyright-year><copyright-holder xml:lang="ru">Шубин В.В.</copyright-holder><copyright-holder xml:lang="en">Shubin V.V.</copyright-holder><license xml:lang="ru" license-type="creative-commons-attribution" xlink:href="https://creativecommons.org/licenses/by/4.0/" xlink:type="simple"><license-p>Данная работа распространяется под лицензией Creative Commons Attribution 4.0.</license-p></license><license xml:lang="en" license-type="creative-commons-attribution" xlink:href="https://creativecommons.org/licenses/by/4.0/" xlink:type="simple"><license-p>This work is licensed under a Creative Commons Attribution 4.0 License.</license-p></license></permissions><self-uri xlink:href="https://vestnik.sibsutis.ru/jour/article/view/833">https://vestnik.sibsutis.ru/jour/article/view/833</self-uri><abstract><p>В статье представлены некоторые проблемы отказов работы интегральных схем (ИС) и их предотвращение на ранних этапах проектирования. Рассмотрены, обобщены и систематизированы вопросы, связанные с отказами ИС, вызванными воздействием эффектов электромиграции и антенны. В статье приведены некоторые примеры, которые могут быть использованы в практической деятельности при разработке ИС для повышения их надёжности с учётом современных тенденций развития в области микроэлектроники.</p></abstract><trans-abstract xml:lang="en"><p>The paper describes some problems of operation failures of integrated circuits (ICs) and corresponding preventative measures at the early stages of design process. The issues related to the problems of IC failures caused by electromigration and antenna effect are considered, generalized and systematized. Some examples that can be used in practice when developing ICs to improve their reliability taking into account current trends in the microelectronics fields are presented.</p></trans-abstract><kwd-group xml:lang="ru"><kwd>электромиграция</kwd><kwd>эффект антенны</kwd></kwd-group><kwd-group xml:lang="en"><kwd>electromigration</kwd><kwd>antenna effect</kwd></kwd-group></article-meta></front><back><ref-list><title>References</title><ref id="cit1"><label>1</label><citation-alternatives><mixed-citation xml:lang="ru">Fiks V. B. On the mechanism of the mobility of ions in metals // Soviet Physics: Solid State, 1959. V. 1, № 1. P. 14-28.</mixed-citation><mixed-citation xml:lang="en">Fiks V. B. On the mechanism of the mobility of ions in metals. Soviet Physics: Solid State, 1959, vol. 1, no. 1, pp. 14-28.</mixed-citation></citation-alternatives></ref><ref id="cit2"><label>2</label><citation-alternatives><mixed-citation xml:lang="ru">Hastings Alan. The Art of ANALOG LAYOUT. New Jersey. Pearson Prentice Hall, 2006. 648 p.</mixed-citation><mixed-citation xml:lang="en">Hastings Alan. The Art of ANALOG LAYOUT. New Jersey, Pearson Prentice Hall, 2006. 648 p.</mixed-citation></citation-alternatives></ref><ref id="cit3"><label>3</label><citation-alternatives><mixed-citation xml:lang="ru">Huntington H. B., Grone A. R. Current-induced marker motion in gold wires // Journal of Physics and Chemistry of Solids. 1961. V. 20. P. 76-87.</mixed-citation><mixed-citation xml:lang="en">Huntington H. B., Grone A. R. Current-induced marker motion in gold wires. Journal of Physics and Chemistry of Solids, 1961, vol. 20, pp. 76-87.</mixed-citation></citation-alternatives></ref><ref id="cit4"><label>4</label><citation-alternatives><mixed-citation xml:lang="ru">Verbruggen A. H. Fundamental questions in the theory of electromigration // IBM Journal of Research and Development. 1988. № 32. P. 93-98.</mixed-citation><mixed-citation xml:lang="en">Verbruggen A. H. Fundamental questions in the theory of electromigration. IBM Journal of. Research and Development, 1988, no. 32, pp. 93-98.</mixed-citation></citation-alternatives></ref><ref id="cit5"><label>5</label><citation-alternatives><mixed-citation xml:lang="ru">Tan C. M., Arijit R. Electromigration in ULSI Interconnection // Materials Science and Engineering. Elsevier. 2007. Is. 58. P. 1-75.</mixed-citation><mixed-citation xml:lang="en">Tan C. M., Roy Arijit. Electromigration in ULSI Interconnection. Materials Science and Engineering. Elsevier, 2007, iss. 58, pp. 1-75.</mixed-citation></citation-alternatives></ref><ref id="cit6"><label>6</label><citation-alternatives><mixed-citation xml:lang="ru">Tao J., Young K. K., Cheung N. W., Hu C. Comparison of Electromigration Reliability of Tungsten and Aluminum Vias Under DC and Time-Varying Current Stressing // Proc. International Reliability Physics Symposium, 1992. V. 14, № 4. P. 338-343.</mixed-citation><mixed-citation xml:lang="en">Tao J., Young K. K., Cheung N. W., Hu C. Comparison of Electromigration Reliability of Tungsten and Aluminum Vias Under DC and Time-Varying Current Stressing. Proc. International Reliability Physics Symposium, 1992, vol. 14, no. 4, pp. 338-343.</mixed-citation></citation-alternatives></ref><ref id="cit7"><label>7</label><citation-alternatives><mixed-citation xml:lang="ru">Ames I., d'Heurle F. M., Horstmann R. E. Reduction of Electromigration in Aluminium Film by Copper Doping // IBM Journal of Research and Development. 1970. V.14, № 4. P. 461-463.</mixed-citation><mixed-citation xml:lang="en">Ames I., d'Heurle F. M., Horstmann R. E. Reduction of Electromigration in Aluminium Film by Copper Doping. IBM Journal of. Research and Development, 1970, vol.14, no. 4, pp. 461-463.</mixed-citation></citation-alternatives></ref><ref id="cit8"><label>8</label><citation-alternatives><mixed-citation xml:lang="ru">Iyer S. S., Ting Ch. Y. Electromigration Study of Al-Cu/Ti/Al-Cu System // Proc. International Reliability Physics Symposium, 1984. P. 273-278.</mixed-citation><mixed-citation xml:lang="en">Iyer S. S., Ting Ch. Y. Electromigration Study of Al-Cu/Ti/Al-Cu System. Proc. International Reliability Physics Symposium, 1984, pp. 273-278.</mixed-citation></citation-alternatives></ref><ref id="cit9"><label>9</label><citation-alternatives><mixed-citation xml:lang="ru">Lloyd J. R., Smith P. M. The Effect of Passivation on the Electromigration Lifetime of Al/Cu Thin Film Conductors // Journal of Vacuum Science Technology A. 1983. V. 1, № 2. P. 455-458.</mixed-citation><mixed-citation xml:lang="en">Lloyd J. R., Smith P. M. The Effect of Passivation on the Electromigration Lifetime of Al/Cu Thin Film Conductors. Journal of Vacuum Science Technology A, 1983, vol. 1, no. 2, pp. 455-458.</mixed-citation></citation-alternatives></ref><ref id="cit10"><label>10</label><citation-alternatives><mixed-citation xml:lang="ru">Chen J. Z., Amerasekera A., Duvvury Ch. Design Methodology for Optimizing Gate Driven ESD Protection Circuits in Submicron CMOS Processes // Proc. EOS/ESD Symposium, 1997. P. 1-10.</mixed-citation><mixed-citation xml:lang="en">Chen J. Z., Amerasekera A., Duvvury Ch. Design Methodology for Optimizing Gate Driven ESD Protection Circuits in Submicron CMOS Processes. Proc. EOS/ESD Symposium, 1997, pp. 1-10.</mixed-citation></citation-alternatives></ref><ref id="cit11"><label>11</label><citation-alternatives><mixed-citation xml:lang="ru">Lienig J, Thiele M. Fundamentals of Electromigration-Aware Integrated Circuit Design. SpringerLink, 2018. 159 p.</mixed-citation><mixed-citation xml:lang="en">Lienig J, Thiele M. Fundamentals of Electromigration-Aware Integrated Circuit Design.lst Ed. SpringerLink, 2018, 159 p.</mixed-citation></citation-alternatives></ref><ref id="cit12"><label>12</label><citation-alternatives><mixed-citation xml:lang="ru">Weste N. H. W., Harris D. M. CMOS VLSI Design: A Circuits and Systems Perspective. 4nd Ed. Boston: Addison-Wesley, Pearson Education, Inc., 2011. 838 p.</mixed-citation><mixed-citation xml:lang="en">Weste, N. H. W., Harris D. M. CMOS VLSI Design: A Circuits and Systems Perspective. 4nd Ed. Boston. Addison-Wesley, Pearson Education, Inc., 2011, 838 p.</mixed-citation></citation-alternatives></ref><ref id="cit13"><label>13</label><citation-alternatives><mixed-citation xml:lang="ru">Gabriel C. T. Gate Oxide Damage: A Brief History and a Look Ahead // Proc. 6th International Symposium on Plasma Process-Induced Damage, 2001. P. 20-24.</mixed-citation><mixed-citation xml:lang="en">Gabriel C. T. Gate Oxide Damage: A Brief History and a Look Ahead. Proceedings 6th International Symposium on Plasma Process-Induced Damage, 2001, pp. 20-24.</mixed-citation></citation-alternatives></ref><ref id="cit14"><label>14</label><citation-alternatives><mixed-citation xml:lang="ru">Watanabe T., Yoshida Y. Dielectric Break-down of Gate Insulator Due to Reactive Ion Etching // Solid State Technology. 1984. V. 27, № 44. P. 263-266.</mixed-citation><mixed-citation xml:lang="en">Watanabe T., Yoshida Y. Dielectric Break-down of Gate Insulator Due to Reactive Ion Etching Solid State Technology, 1984, vol. 27, no. 44, pp. 263-266.</mixed-citation></citation-alternatives></ref><ref id="cit15"><label>15</label><citation-alternatives><mixed-citation xml:lang="ru">Mocuta A. C., Hook T. B., Chou A. I., Wagner T., Stamper A. K., Khare M., Gambino J. P. Plasma Charging Damage in SOI Technology // Proc. 6th International Symposium on Plasma Process-Induced Damage, 2001. P. 104-107.</mixed-citation><mixed-citation xml:lang="en">Mocuta A. C., Hook T. B., Chou A. I., Wagner T., Stamper A. K., Khare M., Gambino J. P. Plasma Charging Damage in SOI Technology. Proceedings 6th International Symposium on Plasma Process-Induced Damage, 2001, pp. 104-107.</mixed-citation></citation-alternatives></ref><ref id="cit16"><label>16</label><citation-alternatives><mixed-citation xml:lang="ru">Simon P., Luchies J.-M., Maly W. Antenna Ratio Definition for VLSI Circuits // Proc. 4th International Symposium on Plasma Process-Induced Damage, 1999. P. 16-20.</mixed-citation><mixed-citation xml:lang="en">Simon P., Luchies J.-M., Maly W. Antenna Ratio Definition for VLSI Circuits. Proc. 4th International Symposium on Plasma Process-Induced Damage, 1999, pp. 16-20.</mixed-citation></citation-alternatives></ref><ref id="cit17"><label>17</label><citation-alternatives><mixed-citation xml:lang="ru">Baker R. Jacob. CMOS: Circuit Design, Layout, and Simulation. New Jersey: John Wiley &amp; Sons Inc., 2011. 1208 p.</mixed-citation><mixed-citation xml:lang="en">Baker R. Jacob. CMOS: Circuit Design, Layout, and Simulation. 3nd Ed. New Jersey, John Wiley &amp; Sons Inc., 2011, 1208 p.</mixed-citation></citation-alternatives></ref></ref-list><fn-group><fn fn-type="conflict"><p>The authors declare that there are no conflicts of interest present.</p></fn></fn-group></back></article>
