High frequency cascade-integrated filters design for 0.18um CMOS technology node
Abstract
The article describes design technique of third order CIC-filters for improved response time systems used in DSP according to the 0.18 цт technology. Throughout this paper the emphasis is on the optimization of CIC response speed, power consumption and architecture. The operation within CAD systems Design Compiler (Synopsys) and MATLAB for HDL-descriptions synthesis is considered.
About the Authors
V. .. Mamychev
Сибирский государственный университет телекоммуникаций и информатики
Russian Federation
Russian Federation
V. .. Sedinin
Сибирский государственный университет телекоммуникаций и информатики
Russian Federation
Russian Federation
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Review
For citations:
Mamychev V..., Sedinin V... High frequency cascade-integrated filters design for 0.18um CMOS technology node. The Herald of the Siberian State University of Telecommunications and Information Science. 2015;(3):3-10. (In Russ.)
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